In a power supply, an overcurrent protection circuit is provided for limiting a load current to protect the power supply and a load from an overload. Generally, overcurrent protection is broadly divided into three methods shown in FIGS. 8(a), 8(b) and 8(c).
In FIG. 8(a), when an output current exceeds the set upper limit, an output voltage decreases and the output current is reduced to provide protection. This method is called Fold-back Type Drooping Characteristic based on the pattern of the correlation characteristic of the output voltage and the output current.
In FIG. 8(b), when an output current exceeds the set upper limit, the output current is immediately reduced to provide protection. This method is called “pendent character” based on the pattern of the correlation characteristic of an output voltage and the output current.
In FIG. 8(c), when an output current exceeds the set upper limit, the output current is reduced at a constant power to provide protection. This method is called an inverted V-shaped characteristic based on the pattern of the correlation characteristic of an output voltage and the output current.
In the case of a switching power supply for detection for overcurrent protection only on the primary side of a transformer, an overcurrent protection set value is deviated by a change of an input voltage, resulting in low accuracy.
In the case of the overcurrent protection characteristic of FIG. 8(c), it is possible to protect a switching transistor on the primary side of a transformer but a current increases in a diode for rectification on the secondary side of the transformer even under protection, which is disadvantageous to overcurrent protection (described in Patent Document 1 and so on).
As compared to FIG. 8(c), when a load current is detected on the secondary side of a transformer T1 as shown in FIG. 6, satisfactory overcurrent protection can be expected.
In FIG. 6, to a primary winding 11 of the transformer T1, an input DC voltage V1 is applied through a switching transistor Q1 acting as a series control element. The frequency of a pulse signal Psw applied to the base of the switching transistor Q1 is controlled by a control circuit 13.
The output of a secondary winding 12 of the transformer T1 is half-wave rectified by a diode D2 and the output is smoothed by a capacitor C3 to obtain an output voltage Vo. A load current i1 is detected by a detection resistor R7 disposed in a secondary-side circuit.
An error amplifier Z2 for supplying information to the control circuit 13 according to a detected voltage of the detection resistor R7 is configured as follows:
A current mirror circuit 14 is made up of an input-side transistor Q4 and an output-side transistor Q3. Between a reference potential G and the base of the transistor Q4 whose base and collector are connected to each other, a voltage source B1 is connected via a resistor R6. The emitter of the transistor Q4 is connected to the detection resistor R7 on the side of the reference potential G.
The base of the transistor Q3 is connected to the base of the transistor Q4 and the collector of the transistor Q3 is connected to the junction point of the resistor R6 and the voltage source B1 via a resistor R4. The emitter of the transistor Q3 is connected to a junction point 15 of the detection resistor R7 and the secondary winding 12 via a resistor R3.
A junction point 16 of the collector of the transistor Q3 and the resistor R4 is connected to the base of an output transistor Q2 via a resistor R2. The emitter and collector of the transistor Q2 are interposed between one end of a resistor R1 having the other end connected to the control circuit 13 and the reference potential G.
In the error amplifier Z2 configured thus, the resistor R4 for determining a reference voltage is connected to the collector of the transistor Q3 and the amplification degree of the error amplifier Z2 is determined by a ratio between the resistance values of the resistors R3 and R4.
When the load current i1 increases, a voltage drop across the detection resistor R7 increases, the voltage of the junction point 16 of the resistor R7 and the resistor R3 decreases, and the collector current of the transistor Q3 increases. Accordingly, a potential decreases on the junction point 15 of the collector of the transistor Q3, the base current of the output transistor Q2 increases, and the load current i1 increases to a set value. At this point, the resistor R1 connected to the control circuit 13 is connected to the reference potential G via the output transistor Q2 and the switching frequency of the primary side is controlled to achieve overcurrent protection of “Fold-back Type Drooping Characteristic” shown in FIG. 8(a).    Patent Document 1: Japanese Patent Laid-Open No. 2004-215394